Blog

Justin Moll, Director of Marketing, VadaTech and Chair of the 40GbE over MicroTCA Committee

MicroTCA has very powerful and compelling features, especially in the realm of system management. The more advanced the features are, the most complex the process can become. This is one of the reasons why the Interoperability Workshops (IWs) are so important.

One of the key benefits of MicroTCA is that the interoperability of the ecosystem was built into the specification from the beginning, not patched-on at a later date like some other architectures. However, there are always subtleties to ensure optimum performance that need to be reviewed. Plus, there are plenty features of Hardware Platform Management, etc., to test. These include power channel notifications, power budgeting management, redundancy testing, RTM management, and more.

The results of the IWs are kept confidential, but I can say that the participant’s products worked very well together in the workshop held Oct 4-6 at the VadaTech facility in Henderson, NV. Any minor bugs/issues are discussed between the parties and quickly addressed to ensure the smoothest operation of interoperable systems. We look forward to continuing these important workshops as the MicroTCA ecosystem continues to rapidly expand with new MicroTCA.4 systems, 40G products emerge, a wealth of new digitizers and FPGA’s hit the market, and much more!

While PICMG and its members are committed to the future of ATCA, we recognize that at some time in the future a new, platform that may not be backwards compatible with ATCA may be needed.

A PICMG working group is already defining the requirements for this new platform, which will be called GEN4™.

The GEN4 architecture will be optimized for very high performance computation and network modular platform applications that are beyond the capacities of current AdvancedTCA systems. It will be targeted at high performance computing, central network, network edge, and high capacity storage applications with critical capacity, performance, reliability, density, and efficiency requirements. The explosive growth of Internet traffic (especially driven by video, big data, and the WEB 3.0) will require the deployment of much more capable network elements and will require that they be deployed rapidly. As datacenter and telecommunications networks converge, and cloud computing and various heterogeneous processing models become prevalent, GEN4 will be positioned as the standard modular platform architecture of choice.

GEN4 will be scalable in computational power, networking bandwidth, and storage capacity.

GEN4 will be a new architecture which is complementary to AdvancedTCA. While the boards and shelves will not be plug compatible, the software and management infrastructure elements will be adaptable between architectures. GEN4 will achieve order of magnitude levels of improvement over original PICMG 3.0 R1.0 systems in multiple dimensions, including:

• Architected with energy efficiency, simplicity, and scalability goals set by emerging market demands.
• Module size for high-capacity networking and compute performance using off-the-shelf silicon.
• System throughput (to hundreds of terabits/s), module bandwidth (to tens of terabits/s), and storage capacity in exabytes.
• Efficient power delivery with High Voltage DC options as well as AC
• Module cooling capacity (over 2000 Watts, with fluid cooling options)
• Scalability to efficiently create large multi-frame systems
• Cybersecurity at the lowest level of the hardware architecture to address secure military communications applications.

GEN4 will be a new approach to address the widely varying performance needs of the applications through hierarchy of increasing capability subsystems, supporting SDN and NFV, while providing investment protection for customers with deployed AdvancedTCA systems. And like all PICMG platforms, it will be an open, public standard that anyone can implement.

GEN4 systems will provide the capacity and density required by the next decade of Internet application and traffic growth, serving the modular platform marketplace from 2015 through at least 2025.

This effort is developing enumerated requirements that incorporate 10GBASE-KX4, 10GBASE-KR and 40GBASE-KR4 to the Common Option (ports 0 and 1), Fat Pipes (ports 4-7) and Extended Pipes (8-11) as defined in AMC.2 and used there and in all variants of MicroTCA. A key goal of this activity is to guarantee backward compatibility with existing MTCA and AMC mechanicals and connectors, and interoperability with BX/BX4 fabric options.

In addition to enumerated requirements, the Working Group may generate guidelines/best practices to help ensure uniform interpretation of the specification and ease potential interoperability issues between BX/BX4 and KX/KX4/KR. These best practices may be generated as a separate deliverable, distinct from the enumerated requirements. Deliverables include:

• A 40G Ethernet Specification for MicroTCA.0 and AMC.2 (analogous to PICMG 3.1R2 40G Ethernet for AdvancedTCA)
• Provide a roadmap for higher speed Ethernet Fabrics for the future (100G, etc.).
• Update the MicroTCA guide to include new higher speed Ethernet options.
• Develop test plan and procedure for signal integrity analysis at 40G speeds. Perform tests with shared costs across working group members and PICMG contributing as budget permits.