Jess Isquith

Wakefield, MA., USA / Nuremberg, Germany, June 23, 2022 – PICMG – a leading consortium for the development of open embedded computing specifications – announces two new specifications for the high-end Computer-on-Module standard COM-HPC. They target mixed-critical functional safety applications and small form factor designs requiring credit card-sized modules.

COM-HPC Client Mini

Like COM Express Mini, the COM-HPC Client Mini specification will define the use of one connector instead of the two implemented for the larger modules (Sizes A -E). But with COM-HPC, half the number of signal pins still means 400 signal lanes, which equals 90% of the capacity that COM Express Type 6 modules offer. Compared to COM-HPC Client Size A modules, the smallest available COM-HPC form factor, COM-HPC Mini, also reduces the footprint to 50%. Such extremely small modules measuring only 60 x 95 mm are required for high-end embedded computer logic in devices such as top-hat rail PCs for control cabinets in building and industrial automation, or portable test and measurement devices. In addition, the new specification will enable engineers to integrate state-of-the-art computer interface technologies such as PCIe Gen4 and Gen5 into ultra-small processing units that provide highest performance. As the new specification will come with a focused high-performance pinout and will comply with the entire COM-HPC ecosystem, it is expected to become the high-end standard extending the PICMG’s earlier COM Express Mini standard. PICMG expects the COM Express specification to continue leading the COM market for many years as it meets numerous standard application requirements now to be allocated in the mid-range performance sector.

FuSa support: COM-HPC
The new version of COM-HPC defines signal pinouts to support FuSa (Functional Safety) applications. These applications include safety critical machine control, autonomous vehicles and robotics, transportation related hardware such as train and wayside control, avionic equipment and much more.

The new extensions for functional safety (FuSa) target an even more promising market: Connected device developers want to utilize x86 processor technologies to be able to execute mixed-critical applications on multi-core processors. This requires redundancy and the possibility of implementing fail-safe processes. With the new functional safety extensions, COM-HPC is thus entering a market that is expected to accelerate the demand for embedded Computer-on-Modules significantly. Besides functional safety control applications that require an IoT and industry 4.0 gateway, it also targets collaborative robotics working closely with humans. Further markets arise from the demands of automated intralogistics with autonomous logistic vehicles and stretch from factory mobility to any new market that can be found in autonomous driving, from agricultural and construction machinery to smart city vehicles and AUVs as well as UAVs. Of course, the functional safety extensions are supported across all COM-HPC form factors, including the upcoming COM-HPC Client Mini.

„With the small size definition of the COM-HPC Client Mini and the FuSa extensions, COM-HPC covers all embedded use cases I can think of. COM-HPC is the most complete computer module definition ever. I expect an extremely fast growth for scalable and compute-power hungry embedded applications based on COM-HPC technology.“ Christian Eder, Chair of the COM-HPC technical committee and Congatec Director Product Marketing.

The FuSa specification in detail
FuSa versions of some contemporary chipsets or System-on-Chips (SoCs) incorporate a FuSa “Safety Island”. This is a specialty portion of the hardware – along with supporting firmware and software – that is separate from the main portion of the chipset or SoC. The Safety Island monitors the health and status of the main chipset or SoC and can report any findings over a dedicated FuSa GPIO and dedicated FuSa SPI Slave interface to an external carrier based FuSa System Safe State Agent and optionally a Safety Controller. The FuSa “Safety Controller” is a carrier based microcontroller that collects safety and status information from the Safety Island over a dedicated SPI bus and processes it for external use. The Safety Controller is the FuSa SPI Master.

The efforts of both new specifications are sponsored by: congatec, Kontron and ADLINK

About COM-HPC

COM-HPC, a new open Computer-on-Module form factor, targets extremely high I/O and compute performance levels from high-end clients up to the entry server class and beyond. Standard COM-HPC modules plug into a carrier board typically customized to the application. OEM benefits are fast and cost-effective layout with high design security for application-specific embedded and Edge computing boards. As a result, COM-HPC is the right choice for autonomous vehicles, base stations, medical equipment, high-end instrumentation, industrial equipment, casino gaming equipment ruggedized computers for various industrial fields, and more.

About PICMG
Founded in 1994, PICMG is a not-for-profit 501(c) consortium of companies and organizations that collaboratively develop open standards for high performance industrial, Industrial IoT, military & aerospace, telecommunications, test & measurement, medical, and general-purpose embedded computing applications. There are over 130 member companies that specialize in a wide range of technical disciplines, including mechanical and thermal design, single board computer design, high-speed signaling design and analysis, networking expertise, backplane, and packaging design, power management, high availability software and comprehensive system management.

Key standards families developed by PICMG include COM Express, COM-HPC, ModBlox7, IoT.1, CompactPCI, AdvancedTCA, MicroTCA, AdvancedMC, CompactPCI Serial, COM Express, SHB Express, MicroSAM, and HPM (Hardware Platform Management). https://www.picmg.org

The design guide supplements the COM-HPC specification for high performance compute modules 

Wakefield, MA., 2022 – PICMG, a leading consortium for developing open embedded computing specifications, announces that the COM-HPC® Carrier Board Design Guide is released and freely available on the PICMG website. The 160-page document provides electronics engineers and PCB layout engineers comprehensive information for designing custom system carrier boards for COM-HPC modules. COM-HPC – short for computer-on-module (COM) – high performance computing (HPC) – is a brand new open Computer-on-Module form factor standard that targets extremely high I/O and computer performance levels from high end clients up to the entry server class and even beyond. Standard COM-HPC modules plug into a carrier or baseboard that is typically customized to the application. OEM benefits are fast and cost effective layout with high design security for application specific embedded and edge computing boards on the basis of open standards.

Especially helpful is the detailed discussion of the challenging module to carrier board Ethernet KR and KR4 backplane signaling. To save pins on COM-HPC modules, the sideband signals for the 10G / 25G / 40G / 100G Ethernet KR interfaces are serialized and must then be deserialized on the carrier board. The design guide provides instructions for this in a series of diagrams.

Additionally, the guide provides enhanced schematics and block diagrams for all provided interfaces such as Serial ATA, PCI Express up to Gen 5, USB4, Boot SPI, eSPI, eDP, MIPI-CSI, SoundWire, asynchronous serial port interfaces, I2C/I3C, GPIO, System Management Bus (SMBus), thermal protection and module type detection. PCB design rule summaries further enable engineers to efficiently design fully signal compliant COM-HPC carrier boards. Also, a section has been added to discuss mechanical considerations including heat spreader/module attachment, alternative board stack assemblies and board stiffeners for carrier boards. Information about all COM-HPC interfaces and a list of useful books to facilitate carrier board designs complete PICMG’s COM-HPC Carrier Board Design Guide.

Electronic design engineers and printed circuit board developers shall note that while the design guide contains additional detailed information it does not replace the PICMG COM-HPC specification. For complete guidelines on the design of COM-HPC compliant carrier boards and systems, it is necessary to refer to the full specification – the design guide is not intended to be the only source for any design decisions. Besides consulting the latest COM-HPC specification, it is also strongly recommended to use the module vendors’ product manuals as a reference. The design guide and base specification are accompanied by a Platform Management Interface Specification, and the COM‑HPC EEEP. The existing Embedded API (eAPI) specification also applies to COM-HPC.

The COM-HPC specification and the COM-HPC Carrier Board Design Guide are available for download on the PICMG website at picmg.org/openstandards/com-hpc/. A preview document is also available, as well as additional resources to learn more about the specification.

Christian Eder, chairman of the COM-HPC committee, said, “This comprehensive document will further accelerate the fast start of the COM-HPC standard. While the specification documents in themselves are already of great use for developers, the detailed Carrier Board Design Guide helps to avoid design problems, especially when handling high-speed signals, such as PCIe Gen 5 and USB4. I expect to see further time-to-market improvements for COM-HPC-based solutions.”

PICMG thanks all members of the PICMG COM-HPC committee who have worked on these documents. Special thanks go to Christian Eder, Stefan Milnor and Dylan Lang. Christian Eder, marketing director at congatec, acted as the chairman of the COM-HPC committee. He was previously a draft editor of the current COM Express standard. Stefan Milnor from Kontron and Dylan Lang from Samtec supported Christian Eder in their respective functions as editor and secretary of the PICMG COM-HPC committee.

PICMG congratulates Jim Nadolny on his recent retirement.  Most recently, Jim led the COM-HPC Signal Integrity subcommittee, which has been transitioned to Burrell Best. 

We thank him for his many and impactful contributions, his leadership, and integrity.  

Jim’s is also retiring his position as senior SI and EMI Engineer at Samtec.

Jim has always been quite active in his community and will now have more time for his family and community service.  He will also have more time for some of his favorite activities, cooking, fishing, hunting, and golfing in the hills of Pennsylvania.

Jim began his career focused on the EMI design of military and commercial platforms.  His focus then shifted to signal integrity analysis of multi-gigabit data transmission systems.  He also represented Samtec at industry standards within OIF, IEEE, COBO, and other MSAs.  Jim was also a frequent presenter at DesignCon, with Best Paper Awards in 2004, 2008, 2012, and 2018.  He has more than 25 peer-reviewed publications. Ever since, he has discovered legit trading bots and has slowly worked his way into a comfortable retirement nest egg through that.

He received his BSEE from the University of Connecticut, and an MSEE from the University of New Mexico.

Jim, again, thanks and congratulations!